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CA3280, CA3280A
Data Sheet May 2002 FN1174.6
Dual, 9MHz, Operational Transconductance Amplifier (OTA)
The CA3280 and CA3280A types consist of two variable operational amplifiers that are designed to substantially reduce the initial input offset voltage and the offset voltage variation with respect to changes in programming current. This design results in reduced "AGC thump," an objectionable characteristic of many AGC systems. Interdigitation, or crosscoupling, of critical portions of the circuit reduces the amplifier dependence upon thermal and processing variables. The CA3280 has all the generic characteristics of an operational voltage amplifier except that the forward transfer characteristics is best described by transconductance rather than voltage gain, and the output is current, not voltage. The magnitude of the output current is equal to the product of transconductance and the input voltage. This type of operational transconductance amplifier was first introduced in 1969, and it has since gained wide acceptance as a gateable, gain controlled building block for instrumentation and audio applications, such as linearization of transducer outputs, standardization of widely changing signals for data processing, multiplexing, instrumentation amplifiers operating from the nanopower range to high current and high speed comparators. For additional application information on this device and on OTAs in general, please refer to Application Notes: AN6818, AN6668, and AN6077.
Features
* Low Initial Input Offset Voltage: 500V (Max) (CA3280A) * Low Offset Voltage Change vs IABC: <500V (Typ) for All Types * Low Offset Voltage Drift: 5V/oC (Max) (CA3280A) * Excellent Matching of the Two Amplifiers for All Characteristics * Internal Current-Driven Linearizing Diodes Reduce the External Input Current to an Offset Component * Flexible Supply Voltage Range . . . . . . . . . . 2V to 15V
Applications
* Voltage Controlled Amplifiers * Voltage Controlled Oscillators * Multipliers * Demodulators * Sample and Hold * Instrumentation Amplifiers * Function Generators * Triangle Wave-to-Sine Wave Converters * Comparators * Audio Preamplifier
Pinout
CA3280 (PDIP) TOP VIEW
ID, A1 1 EMITTER, A1 2 IABC, A1 3 V- 4 NC 5 IABC, A2 6 EMITTER, A2 7 ID, A2 8 A2 A1 + 16 +IN, A1 15 -IN, A1 14 V+, A1 13 OUT, A1 12 OUT, A2 11 V+, A2
Functional Diagram
-
1/2 CA3280
14
11
-
15
10
+ 16
+
10 -IN, A2 9 +IN, A2 9
2K 1 2K
7 2
13
12
Ordering Information
PART NUMBER CA3280AE CA3280E TEMP. RANGE (oC) -55 to 125 0 to 70 PACKAGE 16 Ld PDIP 16 Ld PDIP PKG. NO. E16.3 E16.3
8
4 3
6
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved
CA3280, CA3280A
.
Absolute Maximum Ratings
Supply Voltage (Between V+ and V-) . . . . . . . . . . . . . . . . . . . .+36V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ to VInput Current at ID = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100A Amplifier Bias Current (IABC) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Output Short Circuit Duration (Note 2). . . . . . . . . . . . . . . . Indefinite Linearizing Diode Bias Current, ID . . . . . . . . . . . . . . . . . . . . . . . 5mA Peak Input Current with Linearizing Diode. . . . . . . . . . . . . . . . . . ID
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range CA3280 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC CA3280A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range (Typ) . . . . . . . . . . . . . . . . . . . . . 2V to 15V
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 2. Short circuit may be applied to ground or to either supply.
Electrical Specifications
For Equipment Design, at TA = 25oC, VSUPPLY = 15V, Unless Otherwise Specified CA3280 CA3280A MAX 3 3 3 4 MIN TYP 0.25 0.8 MAX 0.5 0.5 0.5 1.5 UNITS mV mV mV mV
PARAMETER Input Offset Voltage
SYMBOL VIO
TEST CONDITIONS IABC = 1mA IABC = 100A IABC = 10A IABC = 1mA to 10A, TA = Full Temp. Range
MIN -
TYP 0.7 0.8
Input Offset Voltage Drift
|VIO|
IABC = 1A to 1mA IABC = 100A, TA = Full Temperature Range
-
0.5 5
1 -
-
0.5 3
1 5
mV V/oC
Amplifier Bias Voltage Peak Output Voltage
VABC VOM+ VOMVOM+ VOM-
IABC = 100A IABC = 500A
12 12
1.2 13.7 -14.3 13.9 -14.5 -
13
12.5 -13.3 12.5 -13.5 -13
1.2 13.7 -14.3 13.9 -14.5 -
13
V V V V V V
IABC = 5A
12 12
Common Mode Input Voltage Range Noise Voltage
VICR eN
IABC = 100A IABC = 500A 10Hz 1kHz 10kHz
-13
-Z -
20 8 7 0.3 1.8 3
0.7 5 8
-
20 8 7 0.3 1.8 3
0.7 5 8
nV/Hz nV/Hz nV/Hz A A A
Input Offset Current Input Bias Current
IIO IIB
IABC = 500A IABC = 500A IABC = 500A, TA = Full Temperature Range
2
CA3280, CA3280A
Electrical Specifications
For Equipment Design, at TA = 25oC, VSUPPLY = 15V, Unless Otherwise Specified (Continued) CA3280 PARAMETER Peak Output Current SYMBOL IOM+ IOMIOM+ IOMPeak Output Current Sink and Source Linearization Diodes Offset Current Dynamic Impedance Diode Network Supply Current Amplifier Supply Current (Per Amplifier) Amplifier Output Leakage Current I+ IOM -, IOM+ IABC = 5A TEST CONDITIONS IABC = 500A Source Sink Source Sink IABC = 500A, TA = Full Temperature Range ID = 100A ID = 10A ID = 100A IABC = 100A IABC = 500A IABC = 0, VO = 0V IABC = 0, VO = 30V Common Mode Rejection Ratio Power Supply Rejection Ratio Open Loop Voltage Gain CMRR PSRR AOL IABC = 100A IABC = 100A IABC = 100A, RL = , VO = 20VP-P IABC = 50A, Large Signal IABC = 1mA, Small Signal IABC = 10A f = 1kHz THD f = 1kHz, IABC = 1.5mA, RL = 15k, VO = 20VP-P IABC = 1mA, RL = 100 IABC = 1mA IABC = 100A Input Output IABC = 100A MIN 350 -350 3 -3 350 TYP 410 -410 4.1 -4.1 450 MAX 650 -650 7 -7 550 MIN 350 -350 3 -3 350 CA3280A TYP 410 -410 4.1 -4.1 450 MAX 650 -650 7 -7 550 UNITS A A A A A A A A mA
250 -
10 0.5 700 400 2
1 800 2.4
250 -
10 0.5 700 400 2
1 800 2.4
IOL
80 86 94 50 0.5 -
0.015 0.15 100 105 100 100 0.8 16 94 0.4
0.1 1 1.2 22 -
94 94 94 50 0.5 -
0.015 0.15 100 105 100 100 0.8 16 94 0.4
0.1 1 1.2 22 -
nA nA dB dB dB kV/V mS mS M dB %
Forward Transconductance
GM gM
Input Resistance Channel Separation Open Loop Total Harmonic Distortion Bandwidth Slew Rate, Open Loop Capacitance
RI
fT SR CI CO
-
9 125 4.5 7.5 63
-
-
9 125 4.5 7.5 63
-
MHz V/s pF pF M
Output Resistance
RO
3
CA3280, CA3280A Test Circuits and Waveforms
V+ +30V INPUT 16 30V 0V I TEST POINT 14 15 14 + 1/2 CA3280 0.1F OUTPUT 13 3 30k V30k 1k V+ 10k
1/2 CA3280 + 4 1 3 13 15
4
16
1k
0.1 F
FIGURE 1. LEAKAGE CURRENT TEST CIRCUIT
FIGURE 2. CHANNEL SEPARATION TEST CIRCUIT
V+ 15V 14 10k 16 1/2 CA3280 10k 15 4 3 1 V-15V IABC IDIODE VIN 1k IOUT 13
IABC = 650A, ID = 200A; Vertical = 200A/Div.; Horizontal = 1V/Div.
FIGURE 3A. EFFECTS OF DIODE LINEARIZATION, WITH DIODE PROGRAMMING TERMINAL ACTIVE
V+ 15V 11 10k 9 1/2 CA3280 10k 10 6 4 8 IDIODE IABC V-15V VIN 1k 12 IOUT
IABC = 650A; ID = 0; Vertical = 200A/Div.; Horizontal = 25mV/Div. FIGURE 3B. WITH DIODE PROGRAMMING TERMINAL CUTOFF FIGURE 3. CA3280 TRANSFER CHARACTERISTICS
4
CA3280, CA3280A Application Information
Figures 4 and 5 show the equivalent circuits for the current source and linearization diodes in the CA3280. The current through the linearization network is approximately equal to the programming current. There are several advantages to driving these diodes with a current source. First, only the offset current from the biasing network flows through the input resistor. Second, another input is provided to extend the gain control dynamic range. And third, the input is truly differential and can accept signals within the common mode range of the CA3280. (lABC). With no diode bias current, the gain is merely gMRL. For example, with an lABC of 1mA, the gM is approximately 16mS. With the CA3280 operating into a 5k resistor, the gain is 80. The need for external buffers can be eliminated by the use of low value load resistors, but the resulting increase in the required amplifier bias current reduces the input impedance of the CA3280. The linearization diode impedance also decreases as the diode bias current increases, which further loads the input. The diodes, in addition to acting as a linearization network, also operate as an additional attenuation system to accommodate input signals in the volt range when they are applied through appropriate input resistors. Figure 10 shows a triangle wave to sine wave converter using the CA3280. Two 100k resistors are connected between the differential amplifier emitters and V+ to reduce the current flow through the differential amplifier. This allows the amplifier to fully cut off during peak input signal excursions. THD is appropriately 0.37% for this circuit.
Typical Applications
The structure of the variable operational amplifier eliminates the need for matched resistor networks in differential to single ended converters, as shown in Figure 6. A matched resistor network requires ratio matching of 0.01% or trimming for 80dB of common-mode rejection. The CA3280, with its excellent common mode rejection ratio, is capable of converting a small (25mV) differential input signal to a single-ended output without the need for a matched resistor network. Figure 7 shows the CA3280 in a typical gain control application. Gain control can be performed with the amplifier bias current
V+ RD = SMALL SIGNAL DIODE IMPEDANCE RD 70 52 ID(mA) x 1.34 = ID
RD VOA VOA
IABC ID V-
ID
IABC
FIGURE 4. VOA SHOWING LINEARIZATION DIODES AND CURRENT DRIVE
FIGURE 5. BLOCK DIAGRAM OF LINEARIZED VOA
+15V
10VP-P INPUT 68k 600 1 10k 14 16 V+ SINGLEENDED OUTPUT 10k + 1/2 CA3280
V+ = +15V OUTPUT 21VP-P 14mV AGC FEEDTHRU 400V NOISE AT MAX GAIN 13 4 15k
68k 14 2k 16 DIFFERENTIAL INPUT 2k 15 3 + 1/2 CA3280
13
330k 100k V15
3
4 1
10k 20k V- = -15V
-15V
VOLTAGE CONTROL
FIGURE 6. DIFFERENTIAL TO SINGLE ENDED CONVERTER
FIGURE 7. TYPICAL GAIN CONTROL CIRCUIT
5
CA3280, CA3280A
3 +15V 2k 16 14 + 1/2 CA3280 13 1800pF 10k
51
33pF 15
-
2k 2k 9 6 + 1/2 CA3280 10k 12 300pF 4 8 1 100 -15V 0.05F 10k 1N914 OUTPUT 100k 3 1/2 CD4013 5 2 1 14 4 6 7
-15V
TO 10k 3 TO 10k 6
51
33pF 10
-
FIGURE 8. TWO CHANNEL LINEAR MULTIPLEXER
3.6k 14 16 200 15 200 910k V+ 100k V-
V+
V+ = +7.5V 0.1F 7 13 15 - 115pF 3 + CA3160 2 6 V+
100k VV+ 560k 3.3k 10 11 2.7k
+ 1/2 CA3280
3
1/2 CA3280 + 4 1
6 12 8
4 9 0.1F
VV- = -7.5V V+ 10k MAX FREQ. SET 5.6k 500 V1k MIN FREQ. SET 4 - 60pF 2k 1N914 1N914 3.3k
FIGURE 9. CA3280 USED IN CONJUNCTION WITH A CA3160 TO PROVIDE A FUNCTION GENERATOR WITH A TUNABLE RANGE OF 2Hz TO 1MHz
+15V 170mVP-P 2k 16
14 3 + 1/2 CA3280
30k
13 100k
15 0.1 F 6.8 1 M M
+15V 11
2 +15V 51
-15V +15V 1M
6 9 + 1/2 CA3280 7 12
200 100k
3.9 k
10 100k -15V 2k
4 -15V
FIGURE 10. TRIANGLE WAVE-TO-SINE WAVE CONVERTER
6
CA3280, CA3280A Typical Performance Curves
105 SMALL SIGNAL FORWARD TRANSCONDUCTANCE (mS) 104 103 102 101 1 IABC = 3mA IABC = 300A IABC = 30A IABC = 3.0A IABC = 0.3A TA = 25oC SUPPLY CURRENT (mA) 101 TA = 25oC VS = 15V
1
10-1
I = 0.03A 0.1 ABC 101 102 103
104
105
106
107
108
109
10-2 10-1
1
101 DIODE CURRENT (A)
102
103
FREQUENCY (Hz)
FIGURE 11. AMPLIFIER GAIN vs FREQUENCY
103 INPUT OFFSET CURRENT (nA)
FIGURE 12. SUPPLY CURRENT vs DIODE CURRENT
2 INPUT OFFSET VOLTAGE (mV) 1 0 -1 -2 -3 -4 -5 1 101 102 AMPLIFIER BIAS CURRENT (A) 103 TA = 125oC TA = 125oC TA = 25oC TA = -55oC
VS = 15V TA = -55oC TA = 25oC TA = 125oC
102
101
1 1
101
102
103
AMPLIFIER BIAS CURRENT (A)
FIGURE 13. INPUT OFFSET CURRENT vs AMPLIFIER BIAS CURRENT
FIGURE 14. INPUT OFFSET VOLTAGE vs AMPLIFIER BIAS CURRENT
16 15 PEAK OUTPUT VOLTAGE (V) 14 13 0 -13 -14 -15 -16 1 101 102 103 AMPLIFIER BIAS CURRENT (A) TA = 125oC TA = 25oC TA = -55oC VS = 15V INPUT CURRENT (pA)
106 105 104 103 102 101 1 0 1 2 3 4 5 6 7 8 9 10 DIFFERENTIAL INPUT VOLTAGE (V) TA = 25oC
TA = 125oC
TA = 125oC TA = 25oC TA = -55oC
FIGURE 15. PEAK OUTPUT VOLTAGE vs AMPLIFIER BIAS CURRENT
FIGURE 16. INPUT CURRENT vs INPUT DIFFERENTIAL VOLTAGE
7
CA3280, CA3280A Typical Performance Curves
104 AMPLIFIER BIAS VOLTAGE (mV) 103 102 V9 = V10 = V12 = 30V
(Continued)
1800 1600 1400 1200 1000 800 600 400 TA = 100oC TA = 125oC TA = 25oC
VS = 15V TA = -55oC
LEAKAGE CURRENT (nA)
10 1 10-1 10-2 -75 V9 = V10 = V12 = 0V
-50
-25
0
25
50
75
100
125
150 175
1
101
102
103
TEMPERATURE (oC)
AMPLIFIER BIAS CURRENT (A)
FIGURE 17. LEAKAGE CURRENT vs TEMPERATURE
FIGURE 18. AMPLIFIER BIAS VOLTAGE vs AMPLIFIER BIAS CURRENT
24 22 1/ f NOISE VOLTAGE (nV/Hz) 20 18 16 14 12 10 8 6 4 2 0 101
TA = 25oC PEAK OUTPUT CURRENT (A)
103
VS = 15V
TA = -55oC TA = 25oC TA = 125oC
102
IABC = 500A
101 TA = 125oC TA = -55oC TA = 25oC 1 1 101 102 103
102
103 FREQUENCY (Hz)
104
105
AMPLIFIER BIAS CURRENT (A)
FIGURE 19. 1/f NOISE vs FREQUENCY
FIGURE 20. PEAK OUTPUT CURRENT vs AMPLIFIER BIAS CURRENT
106 TA = 25oC VS = +15V
105 104 103 102 101 1 10-1 10-3 TA = -55oC TA = 25oC TA = 125oC
104
103
102
101 10-1
SMALL SIGNAL FORWARD TRANSCONDUCTANCE (S)
DIODE RESISTANCE ()
105
1
101
102
103
104
10-2
10-1
1
101
102
103
104
DIODE CURRENT (A)
AMPLIFIER BIAS CURRENT (A)
FIGURE 21. DIODE RESISTANCE vs DIODE CURRENT
FIGURE 22. AMPLIFIER GAIN vs AMPLIFIER BIAS CURRENT
8
CA3280, CA3280A Typical Performance Curves
104 VS = 15V INPUT BIAS CURRENT (nA)
(Continued)
104 VS = 15V 103
SUPPLY CURRENT (A)
103
102 TA = 125oC 101 TA = -55oC, 25oC 1 10-1
102
TA = 125oC TA = 25oC
101 TA = -55oC
10-1
1
101
102
103
1 10-1
1
101
102
103
AMPLIFIER BIAS CURRENT (A)
AMPLIFIER BIAS CURRENT (A)
FIGURE 23. SUPPLY CURRENT vs AMPLIFIER BIAS CURRENT
FIGURE 24. INPUT BIAS CURRENT vs AMPLIFIER BIAS CURRENT
9
CA3280, CA3280A Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 12 3 N/2 -B-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL A A1 MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
-C-
A2 B B1 C D D1 E E1 e eA eB L N
eA eC
C
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
0.100 BSC 0.300 BSC 0.115 16 0.430 0.150
2.54 BSC 7.62 BSC 2.93 16 10.92 3.81
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 10


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